Sign Extension
in processors, all Computations done in words (8bit, 16bit, 32bit etc)
for a 32bit processor, ALU is built to work with 32bit numbers.
But for a RISC-V 32bit like instructions are not able to provide, full 32bit numbers at once, since the entire instruction cannot be a number, So the process does something called Sign Extension to fill up rest of bits.
12bit to 32bit Extension
for example, take a 12bit number,
We have to make 12bit to a 32bit, we need to fill up the rest of bits in the front while preserving the number as We have 2 options,
- fill with all s
- fill with all s
Since, is positive, we can only use option 1,
4_{10} = 0000\ 0000\ 0000\ 0000\ 0000\ 0000\ 0000\ 0100 _ {2}What if was negative instead?
-4_{10} = 1111\ 1111\ 1100 _ {2}with two's complement. If we fill all the rest with s we get,
-4_{10} = 0000\ 0000\ 0000\ 0000\ 0000\ 1111\ 1111\ 1100 _ {2} = 4092_{10}which is wrong.
using Option 2,
-4_{10} = 1111\ 1111\ 1111\ 1111\ 1111\ 1111\ 1111\ 1100 _ {2} which is correct, so for both positive & negative cases, we need to extend the rest of the bits differently.
What is the common case?
If we think of it as we extend whatever is in the MSB (i.e The sign bit), we can get answer correct in both cases.
Thus, its called Sign Extension.
Sign extension is the process of increasing the bit width of a signed binary number by duplicating its most significant bit (the sign bit) into the new, higher-order bit positions, preserving the number's original value and sign.